DDR2 RAM, 533/667/800Mbps, Double-data Rate Architecture

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Basic Info

Payment Type:	Telegraphic Transfer in Advance (Advance TT, T/T)

Product Description

Memory capacity: 512MB to 2GB

Types:

168-/184-/240-pin socket type dual in line memory module(DIMM)

Data rate: 533/667/800Mbps (maximum)

2.5V (SSTL-2 compatible) I/O for DDR products and 1.8V powersupply for DDR2 products

Chipset organization: 64 x 8, 128 x 4 and 128 x 8

Double data-rate architecture and two data transfers/clockcycle

Bi-directional, differential data strobe (DQS)transmitted/received with data

Used in capturing data at receiver

Data inputs and outputs are synchronized with DQS

DQS edge aligned with data for read and center for write

Various clock inputs (CK and CK)

DLL aligns DQ and DQS transitions with CK transitions

Chipset brands: ELPIDA, Mosel and NANYA

Four internal banks for concurrent operating (component)

Posted CAS by programmable additive latency for better commandand data bus efficiency

Programmable burst length: 2, 4 and 8mm

Programmable/CAS latency: 3

Refresh cycles: 8192 refresh cycles/64ms

2-variations of refresh: auto and self

7.8US average periodic refresh interval (maximum)

DDRL 333/400MHz

DDR2: 533/667/800MHz

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